Delay locked loop circuit and method

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United States of America Patent

PATENT NO 7532050
APP PUB NO 20080030247A1
SERIAL NO

11906872

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Abstract

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A delay locked loop includes initialization circuitry that ensures that a DLL is initialized to an operating point that is not to close to either end of a delay vs. control voltage characteristic. The initialization circuitry forces the DLL to initially search for a lock point starting from an initial delay, the delay is varied in one direction, forcing the DLL to skip the first lock point. The initialization circuitry only allows the DLL to vary the delay of the voltage controlled delay loop in the one direction from the initial delay until the operating point is reached.

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Patent Owner(s)

  • MOSAID TECHNOLOGIES INCORPORATED

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Haerle, Dieter Villach , AT 36 515
Mai, Tony Kanata, CA 13 162
Vlasenko, Peter Ottawa, CA 27 375

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