Apparatus and methods for multi-level sensing in a memory array
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United States of America Patent
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May 12, 2009
Grant Date -
Dec 21, 2006
app pub date -
Aug 14, 2006
filing date -
Mar 29, 2004
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Abstract
A method for sensing a signal received from an array cell within a memory array, the method comprising the steps of generating an analog voltage Vddr proportional to a current of a selected array cell of the memory array, and comparing the analog voltage Vddr with a reference analog voltage Vcomp to generate an output digital signal. A method is also provided for sensing a memory cell by transforming a signal from a memory cell to a time delay, and sensing the memory cell by comparing the time delay to a time delay of a reference cell. Related apparatus is also disclosed.
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