Method and structure for implanting bonded substrates for electrical conductivity
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United States of America Patent
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Jun 16, 2009
Grant Date -
Jun 22, 2006
app pub date -
Nov 15, 2005
filing date -
Nov 24, 2004
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Abstract
A process for forming multi-layered substrates, e.g., silicon on silicon. The process includes providing a first substrate, which has a thickness of material to be removed. The thickness of material to be removed includes a first face region. The process includes joining the first face region of the first substrate to a second face region of a second substrate to form an interface region between the first face region of the first substrate and the second face region of the second substrate. The process includes removing the thickness of material from the first substrate while maintaining attachment of the first face region of the first substrate to the second face region of the second substrate. The process implants particles through the interface region to form a region of the particles within the vicinity of the interface region to electrically couple the thickness of material to the second substrate. In a preferred embodiment, the particles are conductive or can also have other characteristics that facilitates electrical contact or coupling between the first face region and the second face region according to a specific embodiment.
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