Bit line coupling

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7551466
APP PUB NO 20070195571A1
SERIAL NO

11360873

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Abstract

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The invention provides methods and apparatus. Alternate bit-line pairs of a memory device are concurrently selected. Each bit-line pair has one bit line formed at a first vertical level and one adjacent bit line formed at a second vertical level different than the first vertical level.

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Patent Owner(s)

Patent OwnerAddress
U S BANK NATIONAL ASSOCIATION AS COLLATERAL AGENT100 WALL STREET SUITE 1600 NEW YORK NY 10005

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Aritome, Seiichi Boise, US 291 8244

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