Asic based conveyor belt style programmable cross-point switch hardware accelerated simulation engine
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United States of America Patent
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Jul 14, 2009
Grant Date -
May 29, 2008
app pub date -
Sep 15, 2006
filing date -
Sep 15, 2006
priority date (Note) -
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Abstract
An ASIC based hardware accelerated simulation engine accelerates logic verification of integrated circuit designs utilizing a field of ASIC chips interconnected by direct connections. Communication between the chips has to be accomplished by switching technology internal to the chips. The switching technology employing programmable cross-point switches; i.e. hardware elements with input, output and command ports which propagate signals from the input ports to the output ports following a given permutation determined by values on the command port. The ASIC chip contains an instruction memory to program the logic elements thereof. A conveyor belt based implementation of the programmable cross-point switches provides reduced command bit requirements.
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