System and module including a memory device having a power down mode
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United States of America Patent
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Aug 4, 2009
Grant Date -
Sep 29, 2005
app pub date -
May 25, 2005
filing date -
Mar 10, 1998
priority date (Note) -
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status (Latency Note)
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Abstract
A memory module comprises a memory device including a memory array to store data. An interface receives an instruction to exit a power down mode. A register stores a value representative of a period of time to elapse between exiting from the power down mode and a time at which the memory device is capable of receiving a command to access the data. A storage device stores a plurality of parameter information that pertains to the memory device. The value is based on at least a first parameter information of the plurality of parameter information.
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