Thyristor-based semiconductor memory device with back-gate bias
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United States of America Patent
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Aug 11, 2009
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app pub date -
May 4, 2005
filing date -
May 4, 2005
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Abstract
In accordance with an embodiment of the present invention, a thyristor-based semiconductor memory device may comprise an array of thyristor-based memory formed in an SOI wafer. A supporting substrate may be formed with a density of dopants sufficient to assist delivery of a bias level to the backside of an insulating layer beneath a thyristor. Such conductivity within the substrate may allow reliable back-gate control for the gain of a component bipolar device of the thyristor.
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