Alignment key structure in a semiconductor device and method of forming the same
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United States of America Patent
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Aug 11, 2009
Grant Date -
Nov 2, 2006
app pub date -
Apr 19, 2006
filing date -
Apr 29, 2005
priority date (Note) -
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Abstract
An alignment key structure in a semiconductor device is provided. The alignment key structure includes an insulation layer formed on a substrate, and a passivation layer pattern formed on the insulation layer. The insulation layer includes a plurality of metal wirings. The passivation layer pattern includes a first opening that exposes at least one of the metal wirings. Moreover, the first opening has a width which is narrower than a width of the exposed metal wiring.
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