A clock generator includes a clock circuit and a voltage-controlled oscillator in a phase-locked loop. The clock circuit monitors input clock signals and selects one of the input clock signals based on characteristics of the input clock signals. The voltage-controlled oscillator generates a reference clock signal based on the selected clock signal. The clock circuit also includes synthesizers for generating clock signals, each of which has a frequency being a non-integer multiple of a frequency of the reference clock signal. Additionally, the clock circuit individually offsets the clock signals generated by the synthesizers relative to the reference clock signal. The clock generator is capable of switching the input clock signal during operation of the clock generator while maintaining the reference clock signal. Further, the clock generator is programmable to control operation of the clock circuit.
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An application with the status "Published" (which means it is pending) may be recently abandoned, but not yet updated to reflect its abandoned status. However, an application filed less than one year ago is unlikely to be abandoned.
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