Hardware-based encryption/decryption employing dual ported memory and fast table initialization
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United States of America Patent
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Aug 11, 2009
Grant Date -
Apr 13, 2006
app pub date -
Nov 30, 2005
filing date -
Dec 10, 2001
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Abstract
A system for the encryption and decryption of data employing dual ported RAM to accelerate data processing operations during the computation of the encryption and decryption algorithm. The system includes logic to track data changes in the dual ported memory for fast table initialization; a means to accelerate operations by performing read/write operations in different iterations of the algorithm to separate ports on the dual ported RAM in the same clock cycle; and a means to resolve data manipulation conflicts between out of order read/write operations so that the system correctly computes the desired algorithm.
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