Method for redirecting void diffusion away from vias in an integrated circuit design
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United States of America Patent
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Sep 1, 2009
Grant Date -
Jun 5, 2008
app pub date -
Jan 24, 2008
filing date -
Dec 29, 2005
priority date (Note) -
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Abstract
A method for redirecting void diffusion away from vias in an integrated circuit design includes steps of forming an electrical conductor in a first electrically conductive layer of an integrated circuit design, forming a via between a distal end of the electrical conductor and a second electrically conductive layer of the integrated circuit design, and reducing tensile stress in the electrical conductor to divert void diffusion away from the via.
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