Semiconductor package having through-hole via on saw streets formed with partial saw
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United States of America Patent
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Sep 8, 2009
Grant Date -
Nov 6, 2008
app pub date -
Sep 25, 2007
filing date -
May 4, 2007
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A method of forming through-hole vias in a semiconductor wafer involves forming a semiconductor wafer with many die having contact pads disposed on each die. The semiconductor wafer has saw street guides between each die. A trench is formed in the saw streets. The trench extends partially but not completely through the wafer. The uncut portion of the saw street guides below the trench along a backside of the wafer maintains structural support for the semiconductor wafer. The trench is filled with organic material. Via holes are formed in the organic material. Traces are formed between the contact pads and via holes. Conductive material is deposited in the via holes to form metal vias. The uncut portion of the saw streets below the trench along the backside of the semiconductor wafer portion is removed. The semiconductor wafer is singulated along the saw street guides to separate the die.
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