Scalable subsystem architecture having integrated cooling channels
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United States of America Patent
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Sep 8, 2009
Grant Date -
Feb 1, 2007
app pub date -
Jul 27, 2006
filing date -
Aug 1, 2005
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A method for building scalable electronic subsystems is described. Stackable modules employ copper substrates with solder connections between modules, and a ball grid array interface is provided at the bottom of the stack. A cooling channel is optionally provided between each pair of modules. Each module is re-workable because all integrated circuit attachments within the module employ re-workable flip chip connectors. Also, defective modules can be removed from the stack by directing hot inert gas at externally accessible solder connections.
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