Testing of reconfigurable logic and interconnect sources
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United States of America Patent
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Sep 8, 2009
Grant Date -
Mar 31, 2005
app pub date -
Sep 30, 2003
filing date -
Sep 30, 2003
priority date (Note) -
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Abstract
Methods and systems for verifying the proper function of reconfigurable logic elements and reconfigurable interconnects are disclosed. Reconfigurable logic elements in an emulation integrated circuit are arranged such that one set of reconfigurable logic elements is used to test a second set of reconfigurable logic elements. After completion of the test of the second set of reconfigurable logic elements, the roles of the first and seconds sets are reversed and the second set of reconfigurable logic elements is used to test the first set. Reconfigurable interconnects are tested by appropriately pairing the interconnect devices in a mirrored manner during a test.
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