Reversible input/output delay line for bidirectional input/output blocks
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United States of America Patent
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Sep 15, 2009
Grant Date -
N/A
app pub date -
Apr 18, 2006
filing date -
Apr 18, 2006
priority date (Note) -
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status (Latency Note)
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Abstract
An input/output (I/O) structure includes a delay element usable for the input path, the output path, or both input and output paths in a user design. In a first mode, the delay element is included in the input path. In a second mode, the delay element is included in the output path. In a third mode, the I/O structure includes the delay in both outgoing signal paths and incoming signal paths, e.g., by utilizing an output tristate signal to control the direction of the delay line. When the output buffer is driving, the delay is inserted in the output path. When the output buffer is tristated, the delay is inserted in the input path. Thus, a single delay element is dynamically shared by both input and output signals that use the same I/O pad. In an optional fourth mode, the delay element is bypassed by both input and output signals.
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