System and method for power management in memory systems
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United States of America Patent
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Sep 15, 2009
Grant Date -
Feb 7, 2008
app pub date -
Sep 20, 2006
filing date -
Jul 31, 2006
priority date (Note) -
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Abstract
A memory circuit power management system and method are provided. In use, an interface circuit is in communication with a plurality of physical memory circuits and a system. The interface circuit is operable to interface the physical memory circuits and the system for simulating at least one virtual memory circuit with a first power behavior that is different from a second power behavior of the physical memory circuits.
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