Method and system for fabricating strained layers for the manufacture of integrated circuits

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United States of America Patent

PATENT NO 7595499
APP PUB NO 20080141510A1
SERIAL NO

12070574

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method for forming a strained layer of semiconductor material, e.g., silicon, germanium, Group III/V, silicon germanium alloy. The method includes providing a non-deformable surface region having a first predetermined radius of curvature, which is defined by R(1) and is defined normal to the surface region. The method includes providing a first substrate (e.g., silicon wafer) having a first thickness. Preferably, the first substrate has a face, a backside, and a cleave plane defined within the first thickness. The method includes a step of overlying the backside of the first substrate on a portion of the surface region having the predetermined radius of curvature to cause a first bend within the thickness of material to form a first strain within a portion of the first thickness. The method provides a second substrate having a second thickness, which has a face and a backside. The method includes a step of overlying the face of the second substrate on a portion of the face of the first substrate to cause a second bend within the thickness of material to form a second strain within a portion of the second thickness. A step of joining the face of the second substrate to the face of the first substrate form a sandwich structure while maintaining the first bend in the first substrate and the second bend in the second substrate. Preferably, joining occurs using a low temperature process such as plasma activated bonding or the like.

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Patent Owner(s)

Patent OwnerAddress
SILICON GENESIS CORPORATIONSAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Henley, Francois J Aptos , US 178 9676
Kirk, Harry R Campbell , US 6 211
Malik, Igor J Palo Alto , US 20 792
Ong, Philip James Milpitas , US 10 336

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