Integrated circuit routing and compaction
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United States of America Patent
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Oct 13, 2009
Grant Date -
Dec 28, 2006
app pub date -
Jun 22, 2006
filing date -
Jun 24, 2005
priority date (Note) -
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Abstract
An iterative technique is used to automatically route nets and alter spacing of an integrated circuit design to achieve a fully routed and compact result. After identifying cells rows and channel, which are gaps between the rows, the technique determines which nets should be routed in which areas. Spine routing is used for nets than span more than one row or channel. Alter the space between rows, larger or smaller, which will allow routing of the nets.
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