Side wall active pin memory and manufacturing method
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United States of America Patent
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Oct 27, 2009
Grant Date -
May 25, 2006
app pub date -
Nov 21, 2005
filing date -
Nov 22, 2004
priority date (Note) -
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Abstract
A method of forming a memory cell comprises forming a stack comprising a first electrode, an insulating layer over the first electrode, and a second electrode over the insulating layer, with a side wall on the stack. A side wall spacer comprising a programmable resistive material in electrical communication with the first and second electrodes is formed. The side wall spacer is formed by depositing a layer of programmable resistive material over the side wall of the stack, anisotropically etching the layer of programmable resistive material to remove it in areas away from the side wall, and selectively etching the programmable resistive material according to a pattern to define the width of the side wall spacer. In embodiments described herein, the width is about 40 nanometers or less.
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