Two mask floating gate EEPROM and method of making

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United States of America Patent

PATENT NO 7615436
APP PUB NO 20040207001A1
SERIAL NO

10849152

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Abstract

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There is provided a floating gate transistor, such as an EEPROM transistor, and method of making the transistor using two masking steps. The method of making a transistor includes patterning a floating gate layer using a first photoresist mask to form a floating gate rail and doping an active area using the floating gate rail as a mask to form source and drain regions in the active area. The method also includes patterning a control gate layer, a control gate dielectric layer, the floating gate rail, a tunnel dielectric layer and the active area using a second photoresist mask to form a control gate, a control gate dielectric, a floating gate, a tunnel dielectric and a channel island region.

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Patent Owner(s)

Patent OwnerAddress
WODEN TECHNOLOGIES INC251 LITTLE FALLS DRIVE WILMINGTON DE 19808

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kouznetsov, Igor G Santa Clara , US 32 833
Walker, Andrew J Mountain View , US 106 5890

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