Method and system for reducing the time-to-market concerns for embedded system design

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United States of America Patent

PATENT NO 7620678
SERIAL NO

10459859

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Abstract

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Aspects for reducing the time-to-market concerns for embedded system design are described. The aspects include providing an infrastructure to support a plurality of heterogeneous processing nodes as a reconfigurable network. Further included is utilizing the infrastructure to customize at least one of the heterogeneous processing nodes according to individualized design needs to achieve a desired embedded system signal processing engine.

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Patent Owner(s)

Patent OwnerAddress
NVIDIA CORPORATION2788 SAN TOMAS EXPRESSWAY SANTA CLARA CA 95051

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Master, Paul L Sunnyvale , US 105 1549
Scheuermann, W James Saratoga , US 25 534

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