Integrated circuit package system for package stacking and manufacturing method thereof
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United States of America Patent
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Nov 24, 2009
Grant Date -
Feb 7, 2008
app pub date -
Aug 4, 2006
filing date -
Aug 4, 2006
priority date (Note) -
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Abstract
A stackable multi-chip package system is provided including forming an external interconnect having a base and a tip, connecting a first integrated circuit die and the base, stacking a second integrated circuit die over the first integrated circuit die in an active side to active side configuration, connecting the second integrated circuit die and the base, and molding the first integrated circuit die, the second integrated circuit die, and the external interconnect partially exposed.
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