Non-volatile storage with early source-side boosting for reducing program disturb
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United States of America Patent
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Nov 24, 2009
Grant Date -
Jun 12, 2008
app pub date -
Dec 12, 2006
filing date -
Dec 12, 2006
priority date (Note) -
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Abstract
Non-volatile storage with reduced program disturb is provided by boosting unselected NAND strings in an array so that a source side channel, on a source side of a selected word line, is boosted before a drain side channel, on a drain side of the selected word line. In one approach, a first boost mode is used when the selected word line is a lower or intermediate word line. In the first boost mode, boosting of the source and drain side channels is initiated concurrently. A second boost mode is used when the selected word line is a higher word line. In the second boost mode, boosting of the source side channel occurs early relative to the boosting of the drain side channel. Either boost mode include an isolation voltage which tends to isolate the source and drain side channels from one another.
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