Computer system, bus controller, and bus fault handling method used in the same computer system and bus controller
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United States of America Patent
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-
Dec 8, 2009
Grant Date -
Aug 11, 2005
app pub date -
Jan 13, 2005
filing date -
Jan 28, 2004
priority date (Note) -
In Force
status (Latency Note)
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Abstract
The present invention provides a PCI bus controller to prevent system down caused by a PCI bus fault and to enable a PCI device driver to handle all PCI bus faults. A bus signal controlling portion controls a transaction with a PCI device on a PCI bus according to a PCI bus protocol, treats the PCI bus as in a degradation state by lighting up a bus fault indicator when a bus fault is detected, and accepts a request of instructing the PCI device. A configuration portion has the bus fault indicator, updates a configuration register, and sends a reply transaction to an inbound controller portion. An arbitration portion arbitrates for a PCI bus and masks a request of use a bus from PCI device when the bus is in a degradation state.
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