Method of forming a flash NAND memory cell array with charge storage elements positioned in trenches
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United States of America Patent
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Jan 5, 2010
Grant Date -
Jun 26, 2008
app pub date -
Dec 21, 2006
filing date -
Dec 21, 2006
priority date (Note) -
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Abstract
NAND arrays of memory cells are described, as well as methods of forming and using them. Memory cell charge storage devices, such as conductive floating gates, are oriented vertically in trenches, with control gates positioned both in the trenches between charge storage elements and over a horizontal surface between the trenches. Individual charge storage devices are therefore field coupled with two control gates, one on either side.
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