Integrated circuit package system with leadframe substrate
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United States of America Patent
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Jan 12, 2010
Issued Date -
N/A
app pub date -
Oct 23, 2005
filing date -
Nov 15, 2004
priority date (Note) -
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Abstract
A system for manufacturing an integrated circuit package system is provided. A dual-type leadframe having first and second rows of leads is formed. A first row of bumps is formed on an integrated circuit chip. Solder paste is placed on the first row of leads, and the first row of bumps is pressed into the solder paste on the first row of leads. The solder paste is reflow soldered to form solder and connect the integrated circuit chip to the first row of leads, and the integrated circuit chip, the first row of bumps, the solder, and the leadframe are encapsulated.
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