Semiconductor memory device

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United States of America Patent

PATENT NO 7649780
APP PUB NO 20080175067A1
SERIAL NO

12040457

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Abstract

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A semiconductor memory device comprises memory cells, a bitline connected to the memory cells, a read circuit including a precharge circuit, and a first transistor connected between the bitline and the read circuit, wherein a first voltage is applied to a gate of the first transistor when the precharge circuit precharges the bitline, and a second voltage which is different from the first voltage is applied to the gate of the first transistor when the read circuit senses a change in a voltage of the bitline.

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Patent Owner(s)

Patent OwnerAddress
TOSHIBA MEMORY CORPORATION1-1 SHIBAURA 1-CHOME MINATO-KU TOKYO 105-0023

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Nakamura, Hiroshi Kawasaki, JP 877 11765
Tanaka, Tomoharu Yokohama, JP 338 14532
Tanzawa, Toru Ebina, JP 309 5305

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