Integrated circuit package system including stacked die
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United States of America Patent
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Jan 26, 2010
Grant Date -
Jan 15, 2009
app pub date -
Sep 22, 2008
filing date -
Jan 4, 2006
priority date (Note) -
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status (Latency Note)
Importance
Abstract
An integrated circuit package system is provided including providing a wafer with bond pads formed on the wafer. A solder bump is deposited on one or more bond pads. The bond pads and the solder bump are embedded within a mold compound formed on the wafer. A groove is formed in the mold compound to expose a portion of the solder bump. The wafer is singulated into individual die structures at the groove.
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