Signal sampling apparatus and method for DRAM memory

United States of America Patent

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Jan 26, 2010
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Aug 30, 2007
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Feb 15, 2007
filing date
Feb 24, 2006

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Abstract

A signal sampling apparatus for a DRAM memory comprises a phase delay circuit adapted for receiving a data signal and delaying the data signal by a predetermined time to generate a delay signal; and a sampling circuit for sampling the data signal according to the delay signal.

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Patent Owner	Address
REALTEK SEMICONDUCTOR CORP	TAIWAN HSINCHU CHINA HSINCHU CITY TAIWAN PROVINCE

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G11C:STATIC STORES

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Inventor Name	Address	# of filed Patents	Total Citations
Chen, Yi Lin	Taipei, TW	14	288

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Signal sampling apparatus and method for DRAM memory

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United States of America Patent

11675572

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PATENT NO	7652936
APP PUB NO	20070201300A1
SERIAL NO	11675572
DOCKET NO

US Family Size	Non-US Coverage
Patent Longevity	Forward Citations

DATE PUBLISHED	PUBLICATION/PATENT NO.	PUBLICATION TYPE
January 26, 2010	US,7652936,B2 US7652936B2	GRANTED PATENT AS SECOND PUBLICATION
August 30, 2007	US,20070201300,A1 US20070201300A1	FIRST PUBLISHED PATENT APPLICATION

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11675572

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