US Patent No: 7,657,877

Number of patents in Portfolio can not be more than 2000

Method for processing data

ALSO PUBLISHED AS: 20040243984
1 Status Updates

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A method and device for translating a program to a system including at least one first processor and a reconfigurable unit. Code portions of the program which are suitable for the reconfigurable unit are determined. The remaining code of the program is extracted and/or separated for processing by the first processor.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddressTotal Patents
PACT XPP TECHNOLOGIES AGZURICH85

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cardoso, Joao Manuel Paiva Vila Nova de Paiva, PT 4 68
May, Frank Zurich, CH 55 458
Nückel, Armin - 20 102
Vorbach, Martin Karlsruhe, DE 212 2811
Weinhardt, Markus Munchen, DE 14 317

Cited Art Landscape

Patent Info (Count) # Cites Year
 
Other [Check patent profile for assignment information] (5)
5,535,406 Virtual processor module including a reconfigurable programmable matrix 154 1993
6,285,624 Multilevel memory access method 51 2000
6,398,383 Flashlight carriable on one's person 58 2000
2001/0001,860 Adder and multiplier circuits employing logic gates having discrete, weighted inputs and methods of performing combinatorial operations therewith 48 2001
2003/0086,300 FPGA coprocessing system 100 2002
 
TRANSWITCH CORPORATION (1)
6,754,805 Method and apparatus for configurable multi-cell digital signal processing employing global parallel configuration 64 2000
 
SONY CORPORATION (3)
5,477,525 Data destruction preventing method, recording apparatus provided with data destruction preventing capability, and disc recorded with guard band 55 1993
6,188,650 Recording and reproducing system having resume function 65 1998
7,010,687 Transmission apparatus, reception apparatus, transmission method, reception method and recording medium 47 2001
 
SAMSUNG ELECTRONICS CO., LTD. (6)
5,655,124 Selective power-down for high performance CPU/system 111 1995
5,732,209 Self-testing multi-processor die with internal compare points 139 1996
5,889,533 First-in-first-out device for graphic drawing engine 51 1997
6,381,624 Faster multiply/accumulator 50 1999
6,438,747 Programmatic iteration scheduling for parallel processors 94 1999
6,425,054 Multiprocessor operation in a multimedia signal processor 74 2000
 
WOLFGANG LERCHE (1)
6,657,457 Data transfer on reconfigurable chip 65 2000
 
XILINX, INC. (61)
4,706,216 Configurable logic element 498 1985
4,870,302 Configurable electrical circuit having configurable logic elements and configurable interconnects 732 1988
5,343,406 Distributed memory architecture for a configurable logic array and method for using distributed memory 261 1989
RE34363 Configurable electrical circuit having configurable logic elements and configurable interconnects 595 1991
RE34444 Programmable logic device 98 1991
5,469,003 Hierarchically connectable configurable cellular array 338 1993
5,455,525 Hierarchically-structured programmable logic array and system for interconnecting logic elements in the logic array 379 1993
5,430,687 Programmable logic device including a parallel input device for loading memory cells 210 1994
5,781,756 Programmable logic device with partially configurable memory cells and a method for configuration 76 1994
5,426,378 Programmable logic device which stores more than one configuration and means for switching configurations 440 1994
5,521,837 Timing driven method for laying out a user's circuit onto a programmable integrated circuit device 181 1995
5,491,353 Configurable cellular array 110 1995
5,748,979 Reprogrammable instruction set accelerator using a plurality of programmable execution units and an instruction page table 133 1995
* 5,752,035 Method for compiling and executing programs for reprogrammable instruction set accelerator 179 1995
5,583,450 Sequencer for a time multiplexed programmable logic device 154 1995
5,646,545 Time multiplexed programmable logic device 336 1995
5,778,439 Programmable logic device with hierarchical confiquration and state storage 164 1995
5,754,459 Multiplier circuit design for a programmable logic device 154 1996
6,023,564 Data processing system using a flash reconfigurable logic device as a dynamic execution unit for a sequence of instructions 74 1996
5,831,448 Function unit for fine-gained FPGA 114 1996
5,933,023 FPGA architecture having RAM blocks with programmable word length and width and dedicated address and data lines 204 1996
5,821,774 Structure and method for arithmetic function implementation in an EPLD having high speed product term allocation structure 59 1996
5,801,547 Embedded memory for field programmable gate array 140 1996
5,844,422 State saving and restoration in reprogrammable FPGAs 135 1996
6,427,156 Configurable logic block with AND gate for efficient multiplication in FPGAS 79 1997
6,047,115 Method for configuring FPGA memory planes for virtual hardware computation 128 1997
6,011,407 Field programmable gate array with dedicated computer bus interface and method for configuring both 172 1997
5,892,961 Field programmable gate array having programming instructions in the configuration bitstream 222 1997
5,936,424 High speed bus with tree structure for selecting bus driver 103 1997
6,026,481 Microprocessor with distributed registers accessible by programmable logic device 101 1997
6,212,650 Interactive dubug tool for programmable circuits 94 1997
6,049,222 Configuring an FPGA using embedded memory 148 1997
6,230,307 System and method for programming the hardware of field programmable gate arrays (FPGAs) and related reconfiguration resources as if they were software by creating hardware objects 221 1998
6,154,049 Multiplier fabric for use in field programmable gate arrays 135 1998
6,084,429 PLD having a window pane architecture with segmented and staggered interconnect wiring between logic block arrays 255 1998
5,978,260 Method of time multiplexing a programmable logic device 136 1998
6,137,307 Structure and method for loading wide frames of data from a narrow input bus 61 1998
6,172,520 FPGA system with user-programmable configuration ports and method for reconfiguring the FPGA 102 1999
6,198,304 Programmable logic device 82 1999
6,105,105 Data processing system using configuration select logic, an instruction store, and sequencing logic during instruction execution 94 1999
6,263,430 Method of time multiplexing a programmable logic device 80 1999
6,204,687 Method and structure for configuring FPGAS 183 1999
6,434,642 FIFO memory system and method with improved determination of full and empty conditions and amount of data stored 78 1999
RE37195 Programmable switch for FPGA input/output signals 124 2000
6,496,971 Supporting multiple FPGA configuration modes using dedicated on-chip processor 140 2000
6,487,709 Run-time routing for programmable logic devices 207 2000
6,154,048 Structure and method for loading narrow frames of data from a wide input bus 62 2000
6,150,839 Rapidly reconfigurable FPGA having a multiple region architecture with reconfiguration caches useable as data RAM 95 2000
6,421,817 System and method of computation in a programmable logic device using virtual instructions 107 2000
6,201,406 FPGA configurable by two types of bitstreams 62 2000
6,362,650 Method and apparatus for incorporating a multiplier into an FPGA 138 2000
6,373,779 Block RAM having multiple configurable write modes for use in a field programmable gate array 70 2000
6,518,787 Input/output architecture for efficient configuration of programmable input/output cells 102 2000
6,480,954 Method of time multiplexing a programmable logic device 238 2001
6,886,092 Custom code processing in PGA by providing instructions from fixed logic processor portion to programmable dedicated processor portion 73 2001
6,476,634 ALU implementation in single PLD logic cell 80 2002
7,038,952 Block RAM with embedded FIFO buffer 59 2004
2005/0144,210 Programmable logic device with dynamic DSP architecture 88 2004
2005/0144,215 Applications of cascading DSP slices 114 2004
2006/0230,094 Digital signal processing circuit having input register blocks 85 2006
2006/0230,096 Digital signal processing circuit having an adder circuit with carry-outs 83 2006
 
LUJACK SYSTEMS LLC (1)
5,065,308 Processing cell for fault tolerant arrays 90 1991
 
UNIVERSITY OF HAWAII (1)
5,574,930 Computer system and method using functional memory 135 1994
 
RENESAS TECHNOLOGY CORP. (1)
6,928,523 Synchronous signal producing circuit for controlling a data ready signal indicative of end of access to a shared memory and thereby controlling synchronization between processor and coprocessor 54 2001
 
COMTECH TELECOMMUNICATIONS CORP. (1)
5,532,693 Adaptive data compression system with systolic string matching logic 119 1994
 
NXP B.V. (1)
5,537,580 Integrated circuit fabrication using state machine extraction from behavioral hardware description language 139 1994
 
HUGHES ELECTRONICS CORPORATION (2)
4,498,134 Segregator functional plane for use in a modular array processor 111 1982
5,901,279 Connection of spares between multiple programmable devices 67 1996
 
RENESAS ELECTRONICS CORPORATION (1)
6,400,601 Nonvolatile semiconductor memory device 67 2000
 
Wavetracer, Inc. (1)
5,193,202 Processor array with relocated operand physical address generator capable of data transfer to distant physical processor for each virtual processor while simulating dimensionally larger array processor 94 1990
 
BROADCOM CORPORATION (4)
5,915,123 Method and apparatus for controlling configuration memory contexts of processing elements in a network of multiple context processing elements 156 1997
6,108,760 Method and apparatus for position independent reconfiguration in a network of multiple context processing elements 92 1997
6,122,719 Method and apparatus for retiming in a network of multiple context processing elements 91 1997
6,457,116 Method and apparatus for controlling contexts of multiple context processing elements in a network of multiple context processing elements 152 1999
 
LOCKHEED MARTIN CORPORATION (1)
4,901,268 Multiple function data processor 96 1988
 
PACT GMBH (1)
7,237,087 Reconfigurable multidimensional array processor allowing runtime reconfiguration of selected individual array cells 57 2002
 
PACT INFORMATIONSTECHNOLOGIE GMBH (2)
6,480,937 Method for hierarchical caching of configuration data having dataflow processors and modules having two-or multidimensional programmable cell structure (FPGAs, DPGAs, etc.)-- 103 2001
6,687,788 Method of hierarchical caching of configuration data having dataflow processors and modules having two-or multidimensional programmable cell structure (FPGAs, DPGAs , etc.) 75 2002
 
HEWLETT-PACKARD COMPANY (1)
4,852,043 Daisy-chain bus system with truncation circuitry for failsoft bypass of defective sub-bus subsystem 80 1987
 
IMEC (1)
6,421,809 Method for determining a storage bandwidth optimized memory organization of an essentially digital device 127 1999
 
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (16)
4,663,706 Multiprocessor multisystem communications network 171 1983
5,226,122 Programmable logic system for filtering commands to a microprocessor 115 1987
5,014,193 Dynamically configurable portable computer system 206 1988
5,203,005 Cell structure for linear array wafer scale integration architecture with capability to open boundary I/O bus without neighbor acknowledgement 73 1989
5,287,472 Memory system using linear array wafer scale integration architecture 103 1990
5,353,432 Interactive method for configuration of computer system and circuit boards with user specification of system resources and computer resolution of resource conflicts 112 1991
5,996,083 Microprocessor having software controllable power consumption 234 1995
6,003,143 Tool and method for diagnosing and correcting errors in a computer program 110 1997
5,857,097 Method for identifying reasons for dynamic stall cycles during the execution of a program 93 1997
5,884,075 Conflict resolution using self-contained virtual devices 77 1997
6,125,408 Resource type prioritization in generating a device configuration 81 1997
6,035,371 Method and apparatus for addressing a static random access memory device based on signals for addressing a dynamic memory access device 51 1997
6,157,214 Wiring of cells in logic arrays 52 1999
6,507,947 Programmatic synthesis of processor element arrays 176 1999
2002/0186,837 Multiple prime number generation using a parallel prime number search algorithm 1 2001
6,782,445 Memory and instructions in computer architecture containing processor and coprocessor 64 2001
 
LATTICE SEMICONDUCTOR CORPORATION (11)
5,233,539 Programmable gate array with improved interconnect structure, input/output structure and configurable logic block 171 1989
5,015,884 Multiple array high performance programmable logic device family 135 1990
5,489,857 Flexible synchronous/asynchronous cell structure for a high density programmable logic device 101 1992
5,422,823 Programmable gate array device having cascaded means for function definition 149 1994
5,485,104 Logic allocator for a programmable logic device 94 1995
5,586,044 Array of configurable logic blocks including cascadable lookup tables 92 1995
5,559,450 Field programmable gate array with multi-port RAM 179 1995
5,587,921 Array of configurable logic blocks each including a look up table having inputs coupled to a first multiplexer and having outputs coupled to a second multiplexer 90 1995
5,892,962 FPGA-based processor 264 1996
6,034,538 Virtual logic system for reconfigurable hardware 143 1998
6,803,787 State machine in a programmable logic device 66 2002
 
U.S. PHILIPS CORPORATION (1)
5,659,797 Sparc RISC based computer system including a single chip processor with memory management and DMA units coupled to a DRAM interface 115 1992
 
The United States of America as represented by the Administrator of the National Aeronautics and Space Administration (1)
5,548,773 Digital parallel processor array for optimum path planning 108 1993
 
SONY PICTURES ENTERTAINMENT INC. (1)
6,539,415 Method and apparatus for the allocation of audio/video tasks in a network system 51 1997
 
PACT XPP TECHNOLOGIES AG (17)
5,943,242 Dynamically reconfigurable data processing system 102 1995
6,021,490 Run-time reconfiguration method for programmable units 95 1997
6,038,650 Method for the automatic address generation of modules within clusters comprised of a plurality of these modules 67 1997
6,081,903 Method of the self-synchronization of configurable elements of a programmable unit 94 1997
6,088,795 Process for automatic dynamic reloading of data flow processors (DFPs) and units with two or three-dimensional programmable cell architectures (FPGAs, DPGAs and the like) 80 1997
6,119,181 I/O and memory bus system for DFPs and units with two- or multi-dimensional programmable cell architectures 98 1997
6,425,068 UNIT FOR PROCESSING NUMERIC AND LOGIC OPERATIONS FOR USE IN CENTRAL PROCESSING UNITS (CPUS), MULTIPROCESSOR SYSTEMS, DATA-FLOW PROCESSORS (DSPS), SYSTOLIC PROCESSORS AND FIELD PROGRAMMABLE GATE ARRAYS (EPGAS) 91 1997
6,405,299 Internal bus system for DFPS and units with two- or multi-dimensional programmable cell architectures, for managing large volumes of data with a high interconnection complexity 94 1998
6,728,871 Runtime configurable arithmetic and logic cell 59 1999
6,338,106 I/O and memory bus system for DFPS and units with two or multi-dimensional programmable cell architectures 97 1999
6,542,998 Method of self-synchronization of configurable elements of a programmable module 87 1999
6,526,520 Method of self-synchronization of configurable elements of a programmable unit 65 2000
6,697,979 Method of repairing integrated circuits 109 2000
6,477,643 Process for automatic dynamic reloading of data flow processors (dfps) and units with two-or-three-dimensional programmable cell architectures (fpgas, dpgas, and the like) 153 2000
6,571,381 Method for deadlock-free configuration of dataflow processors and modules with a two- or multidimensional programmable cell structure (FPGAs, DPGAs, etc.) 89 2001
6,513,077 I/O and memory bus system for DFPs and units with two- or multi-dimensional programmable cell architectures 66 2001
6,721,830 I/O and memory bus system for DFPs and units with two- or multi-dimensional programmable cell architectures 63 2002
 
FIFTH GENERATION COMPUTER CORP. (1)
4,860,201 Binary tree parallel processor 228 1986
 
UNIVERSITY OF WASHINGTON (2)
5,208,491 Field programmable gate array 402 1992
6,023,742 Reconfigurable computing architecture for providing pipelined data paths 226 1997
 
OKI ELECTRIC INDUSTRY CO., LTD. (1)
4,686,386 Power-down circuits for dynamic MOS integrated circuits 113 1985
 
NEORAM LLC (1)
5,838,165 High performance self modifying on-the-fly alterable logic FPGA, architecture and method 322 1996
 
FLETCHER-TERRY COMPANY, THE (1)
5,076,482 Pneumatic point driver 20 1990
 
SUN MICROSYSTEMS, INC. (5)
6,240,502 Apparatus for dynamically reconfiguring a processor 71 1997
6,490,695 Platform independent memory image analysis architecture for debugging a computer program 69 1999
6,286,134 Instruction selection in a multi-platform environment 92 1999
6,779,016 Extensible computing system 141 2000
6,704,816 Method and apparatus for executing standard functions in a computer system using a field programmable gate array 150 2000
 
Hughes Aircraft Company (2)
5,021,947 Data-flow multiprocessor architecture with three dimensional multistage interconnection network for efficient signal and data processing 266 1990
5,379,444 Array of one-bit processors each having only one bit of memory 73 1994
 
RICOH COMPANY, LTD. (6)
5,511,173 Programmable logic array and data processing unit using the same 109 1994
5,794,062 System and method for dynamically reconfigurable computing using a processing unit having changeable internal hardware organization 182 1995
5,854,918 Apparatus and method for self-timed algorithmic execution 107 1996
5,933,642 Compiling system and method for reconfigurable computing 145 1997
* 6,077,315 Compiling system and method for partially reconfigurable computing 97 1998
6,058,469 System and method for dynamically reconfigurable computing using a processing unit having changeable internal hardware organization 90 1998
 
ITT CORPORATION (1)
4,852,048 Single instruction multiple data (SIMD) cellular array processing apparatus employing a common bus where a first number of bits manifest a first bus portion and a second number of bits manifest a second bus portion 114 1985
 
FUJI XEROX CO., LTD. (2)
5,204,935 Programmable fuzzy logic circuits 92 1992
5,448,186 Field-programmable gate array 151 1994
 
ARM LIMITED (1)
5,525,971 Integrated circuit 81 1994
 
PERFORMANCE SEMICONDUCTOR CORPORATION (1)
4,884,231 Microprocessor system with extended arithmetic logic unit 50 1986
 
NATIONAL SEMICONDUCTOR CORPORATION (3)
5,081,375 Method for operating a multiple page programmable logic device 100 1991
5,336,950 Configuration features in a configurable logic array 218 1993
5,784,636 Reconfigurable computer architecture for use in signal processing applications 275 1996
 
LOCKHEED MARTIN ROLM MIL-SPEC CORP. (1)
5,418,953 Method for automated deployment of a software program onto a multi-processor architecture 90 1993
 
Versity Design, Inc. (1)
6,321,366 Timing-insensitive glitch-free logic system and method 127 1998
 
HTC CORPORATION (1)
* 6,219,833 Method of using primary and secondary processors 93 1998
 
SNAP-ON TOOLS CORPORATION (1)
5,218,302 Interface for coupling an analyzer to a distributorless ignition system 61 1991
 
INTERSIL CORPORATION (1)
4,498,172 System for polynomial division self-testing of digital networks 109 1982
 
PACT INFORMATIONSTECHNOLOGIE AG (2)
7,210,129 Method for translating programs for reconfigurable architectures 71 2001
2004/0015,899 Method for processing data 71 2001
 
COMPUTER UPGRADE CORPORATION (1)
5,034,914 Optical disk data storage method and apparatus with buffered interface 149 1988
 
TEXAS INSTRUMENTS INCORPORATED (5)
5,522,083 Reconfigurable multi-processor operating in SIMD mode with one processor fetching instructions for use by remaining processors 210 1994
5,532,957 Field reconfigurable logic/memory array 107 1995
6,279,077 Bus interface buffer control in a microprocessor 104 1997
5,960,193 Apparatus and system for sum of plural absolute differences 108 1997
6,256,724 Digital signal processor with efficiently connectable hardware co-processor 62 1999
 
Carlstedt Elektronik AB (1)
5,555,434 Computing device employing a reduction processor and implementing a declarative language 87 1994
 
PANASONIC EUROPE LTD. (1)
6,553,395 Reconfigurable processor devices 60 2001
 
NCR CORPORATION (1)
6,665,758 Software sanity monitor 73 1999
 
TM PATENTS, L.P. (1)
5,123,109 Parallel processor including a processor array with plural data transfer arrangements including (1) a global router and (2) a proximate-neighbor transfer system 94 1990
 
SRI INTERNATIONAL (1)
* 6,757,892 Method for determining an optimal partitioning of data among several memories 60 2000
 
MUTEX SOLUTIONS, LTD. (1)
6,282,701 System and method for monitoring and analyzing the execution of computer programs 338 1998
 
INTELLECTUAL VENTURES HOLDING 6 LLC (1)
6,173,434 Dynamically-configurable digital processor using method for relocating logic array modules 82 1997
 
MICRON TECHNOLOGY, INC. (2)
6,105,106 Computer system, memory device and shift register including a balanced switching circuit with series connected transfer gates which are selectively clocked for fast switching times 58 1997
6,516,382 Memory device balanced switching circuit and method of controlling an array of transfer gates for fast switching times 52 2001
 
VLSI TECHNOLOGY, INC. (1)
5,860,119 Data-packet fifo buffer system with end-of-packet flags 82 1996
 
ADELANTE TECHNOLOGIES B.V. (1)
6,044,030 FIFO unit with single pointer 53 1998
 
XEROX CORPORATION (1)
5,924,119 Consistent packet switched memory bus for shared memory multiprocessors 80 1994
 
CAL. MEDIA, L.L.C. (1)
5,675,743 Multi-media server 91 1995
 
UNIVERSITY OF SOUTHWESTERN LOUISIANA, A UNIVERSITY OF LA (1)
4,571,736 Digital communication system employing differential coding and sample robbing 58 1983
 
PIE DESIGNS SYSTEMS, INC. (1)
5,425,036 Method and apparatus for debugging reconfigurable emulation systems 261 1992
 
SUMITOMO BANK OF NEW YORK TRUST COMPANY (1)
6,378,068 Suspend/resume capability for a protected mode microprocesser 187 1995
 
GE FANUC AUTOMATION NORTH AMERICA, INC. (2)
5,109,503 Apparatus with reconfigurable counter includes memory for storing plurality of counter configuration files which respectively define plurality of predetermined counters 106 1989
5,142,469 Method for converting a programmable logic controller hardware configuration and corresponding control program for use on a first programmable logic controller to use on a second programmable logic controller 128 1990
 
SEASOUND, LLC (2)
5,361,373 Integrated circuit computing device comprising a dynamically configurable gate array having a microprocessor and reconfigurable instruction execution means and method therefor 273 1992
5,600,845 Integrated circuit computing device comprising a dynamically configurable gate array having a microprocessor and reconfigurable instruction execution means and method therefor 191 1994
 
BSC ACQUISTION, INC. (1)
6,260,179 Cell arrangement evaluating method, storage medium storing cell arrangement evaluating program, cell arranging apparatus and method, and storage medium storing cell arranging program 169 1998
 
SEFTA TRUSTEES LIMITED (1)
5,497,498 Video processing module using a second programmable logic device which reconfigures a first programmable logic device for data transformation 301 1993
 
COX COMMUNICATIONS, INC. (1)
5,867,723 Advanced massively parallel computer with a secondary storage device coupled through a secondary storage interface 98 1996
 
UNIVERSITY OF KENTUCKY RESEARCH FOUNDATION (2)
6,202,182 Method and apparatus for testing field programmable gate arrays 104 1998
6,631,487 On-line testing of field programmable gate array resources 67 2000
 
NORMAN, RICHARD S. (2)
5,801,715 Massively-parallel processor array with outputs from individual processors directly to an external device without involving other processors or a common physical carrier 91 1994
5,748,872 Direct replacement cell fault tolerant architecture 223 1996
 
PARALLEL SIMULATION TECHNOLOGY, LLC (1)
5,418,952 Parallel processor cell computer system 140 1992
 
ROCKWELL COLLINS, INC. (1)
6,374,286 Real time processor capable of concurrently running multiple independent JAVA machines 315 1998
 
Mitsubishi Electric Semiconductor Software Co., Ltd. (2)
5,657,330 Single-chip microprocessor with built-in self-testing function 84 1995
6,185,731 Real time debugger for a microcomputer 60 1995
 
MENTOR GRAPHICS CORPORATION (1)
5,649,176 Transition analysis and circuit resynthesis method and device for digital circuit modeling 148 1995
 
MENTOR GRAPHICS (HOLDING) LTD. (1)
5,754,827 Method and apparatus for performing fully visible tracing of an emulation 113 1995
 
BANK OF AMERICA, N.A. (2)
6,150,837 Enhanced field programmable gate array 168 1997
6,211,697 Integrated circuit that includes a field-programmable gate array and a hard gate array having the same underlying structure 154 1999
 
GOOGLE INC. (2)
6,076,157 Method and apparatus to force a thread switch in a multithreaded processor 172 1997
6,757,847 Synchronization for system analysis 62 1999
 
VIRGINIA POLYTECHNIC INSTITUTE AND STATE UNIVERSITY (1)
5,828,858 Worm-hole run-time reconfigurable processor field programmable gate array (FPGA) 160 1996
 
SCHLUMBERGER TECHNOLOGIES, INC. (1)
4,882,687 Pixel processor 94 1986
 
The United States of America as represented by the Secretary of the Air Force (2)
5,694,602 Weighted system and method for spatial allocation of a parallel load 68 1996
2002/0045,952 High performance hybrid micro-computer 65 2001
 
I-CUBE, INC. (1)
5,960,200 System to transition an enterprise to a distributed infrastructure 295 1996
 
KONINKLIJKE PHILIPS ELECTRONICS N.V. (1)
2002/0083,308 Data processing device with a configurable functional unit 56 2001
 
SHARP KABUSHIKI KAISHA (3)
5,115,510 Multistage data flow processor with instruction packet, fetch, storage transmission and address generation controlled by destination information 94 1988
5,327,125 Apparatus for and method of converting a sampling frequency according to a data driven type processing 103 1993
5,870,620 Data driven type information processor with reduced instruction execution requirements 54 1996
 
Hudson Soft Co., Ltd. (1)
5,530,873 Method and apparatus for processing interruption 78 1993
 
LATROSSE TECHNOLOGIES, L.L.C. (1)
5,887,165 Dynamically reconfigurable hardware system for real-time control of processes 119 1997
 
SILICON GRAPHICS INTERNATIONAL CORP. (1)
5,841,973 Messaging in distributed memory multiprocessing system having shell circuitry for atomic control of message storage queue's tail pointer structure in local memory 136 1996
 
Alliant Computer Systems Corporation (1)
5,099,447 Blocked matrix multiplication for computers with hierarchical memory 71 1990
 
SP TECHNOLOGY CORP., 1150 QUAIL LAKE LOOP, COLORADO SPRINGS, CO 80906 A CORP. OF DE (1)
5,303,172 Pipelined combination and vector signal processor 99 1988
 
SGS-THOMSON MICROELECTRONICS, INC. (1)
5,128,559 Logic block for programmable logic devices 218 1991
 
THESEUS RESEARCH, INC. (1)
4,667,190 Two axis fast access memory 91 1983
 
KUBOTA U.S.A. INC. (1)
4,959,781 System for assigning interrupts to least busy processor that already loaded same class of interrupt routines 67 1988
 
SGS-THOMSON MICROELECTRONICS LIMITED (1)
5,473,267 Programmable logic device with memory that can store routing data of logic data 164 1995
 
MAXTOR CORPORATION (1)
5,041,924 Removable and transportable hard disk subsystem 162 1988
 
THE JOHNS HOPKINS UNIVERSITY (1)
4,720,780 Memory-linked wavefront array processor 234 1985
 
KAWASAKI MICROELECTRONICS, INC. (1)
6,437,441 Wiring structure of a semiconductor integrated circuit and a method of forming the wiring structure 106 1998
 
PICOCHIP DESIGNS LIMITED (1)
2004/0078,548 Processor architecture 64 2003
 
AGILENT TECHNOLOGIES, INC. (1)
4,720,778 Software debugging analyzer 82 1985
 
ANALOGIC CORPORATION (1)
5,301,344 Multibus sequential processor to perform in parallel a plurality of reconfigurable logic operations on a plurality of data sets 140 1991
 
TAYLOR MADE GOLF COMPANY, INC. (1)
5,294,119 Vibration-damping device for a golf club 115 1992
 
CYPRESS SEMICONDUCTOR CORPORATION (1)
6,538,468 Method and apparatus for multiple boot-up functionalities for a programmable logic device (PLD) 108 2000
 
GEO SEMICONDUCTOR INC. (2)
4,739,474 Geometric-arithmetic parallel processor 175 1983
5,421,019 Parallel data processor 107 1992
 
EXAR CORPORATION (1)
6,633,181 Multi-scale programmable array 86 1999
 
ARIX COMPUTER CORPORATION, 821 FOX LANE SAN JOSE, CALIFORNIA 95131 (1)
5,276,836 Data processing device with common memory connecting mechanism 75 1991
 
PRASENDT INVESTMENTS, LLC (1)
5,475,583 Programmable control system including a logic module and a method for programming 96 1992
 
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (1)
5,581,731 Method and apparatus for managing video data for faster access by selectively caching video data 54 1994
 
HITACHI, LTD. (3)
5,072,178 Method and apparatus for testing logic circuitry by applying a logical test pattern 108 1990
5,537,601 Programmable digital signal processor for performing a plurality of signal processings 244 1994
5,848,238 Information processing system and logic LSI, detecting a fault in the system or the LSI, by using internal data processed in each of them 75 1997
 
THE UNIVERSITY OF NORTH CAROLINA AT CHAPEL HILL (1)
6,874,108 Fault tolerant operation of reconfigurable devices utilizing an adjustable system clock 64 2002
 
AKAMAI TECHNOLOGIES, INC. (2)
2009/0132,648 CONTENT DELIVERY AND GLOBAL TRAFFIC MANAGEMENT NETWORK SYSTEM 38 2009
2009/0132,648 CONTENT DELIVERY AND GLOBAL TRAFFIC MANAGEMENT NETWORK SYSTEM 38 2009
 
APPLE INC. (1)
6,434,695 Computer operating system using compressed ROM image in RAM 142 1998
 
MICROPUMP, INC. (1)
5,865,239 Method for making herringbone gears 53 1997
 
KABUSHIKI KAISHA TOSHIBA (4)
5,867,691 Synchronizing system between function blocks arranged in hierarchical structures and large scale integrated circuit using the same 97 1993
5,754,820 Microprocessor system with cache memory for eliminating unnecessary invalidation of cache data 72 1995
5,862,403 Continuous data server apparatus and data transfer scheme enabling multiple simultaneous data accesses 80 1996
6,587,939 Information processing apparatus provided with an optimized executable instruction extracting unit for extending compressed instructions 76 2000
 
Bell Telephone Laboratories, Incorporated (2)
4,590,583 Coin telephone measurement circuitry 57 1982
4,682,284 Queue administration method and apparatus 126 1984
 
RAYTHEON COMPANY (1)
4,972,314 Data flow signal processor method and apparatus 146 1988
 
SUNPLUS TECHNOLOGY CO., LTD. (1)
6,131,149 Apparatus and method for reading data from synchronous memory with skewed clock pulses 168 1999
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (29)
4,566,102 Parallel-shift error reconfiguration 115 1983
5,212,716 Data edge phase sorting circuits 64 1991
5,347,639 Self-parallelizing computer system and method 107 1991
5,590,345 Advanced parallel array processor(APAP) 181 1992
5,590,348 Status predictor for combined shifter-rotate/merge unit 70 1992
5,311,079 Low power, high performance PLA 60 1992
5,794,059 N-dimensional modified hypercube 138 1994
5,513,366 Method and system for dynamically reconfiguring a register file in a vector processor 165 1994
5,475,856 Dynamic multi-mode parallel processing array 319 1994
5,483,620 Learning machine synapse processor system apparatus 88 1995
5,625,836 SIMD/MIMD processing memory element (PME) 119 1995
5,652,529 Programmable array clock/reset resource 65 1995
5,646,544 System and method for dynamically reconfiguring a programmable gate array 293 1995
5,717,943 Advanced parallel array processor (APAP) 172 1995
5,713,037 Slide bus communication functions for SIMD/MIMD array processor 103 1995
5,754,871 Parallel processing system having asynchronous SIMD processing 107 1995
* 5,978,583 Method for resource control in parallel environments using program organization and run-time support 96 1995
5,737,565 System and method for diallocating stream from a stream buffer 85 1995
5,588,152 Advanced parallel processor including advanced support hardware 162 1995
5,745,734 Method and system for programming a gate array using a compressed configuration bit stream 203 1995
6,311,265 Apparatuses and methods for programming parallel computers 103 1996
5,617,547 Switch network extension of bus architecture 115 1996
6,785,826 Self power audit and control circuitry for microprocessor functional units 74 1996
5,734,921 Advanced parallel array processor computer package 129 1996
6,054,873 Interconnect structure between heterogeneous core regions in a programmable array 203 1999
* 6,321,373 Method for resource control in parallel environments using program organization and run-time support 96 1999
6,542,844 Method and apparatus for tracing hardware states using dynamically reconfigurable test circuits 118 2000
6,829,697 Multiple logical interfaces to a shared coprocessor resource 84 2000
6,961,924 Displaying variable usage while debugging 70 2002
 
MICRAL, INC. (1)
5,412,795 State machine having a variable timing mechanism for varying the duration of logical output states of the state machine based on variation in the clock frequency 55 1992
 
HIRANUMA, TAKEO (1)
6,188,240 Programmable function block 90 1999
 
ADVANCED MICRO DEVICES, INC. (1)
5,625,806 Self configuring speed path in a microprocessor with multiple clock option 75 1996
 
LUCENT TECHNOLOGIES INC. (1)
6,086,628 Power-related hardware-software co-synthesis of heterogeneous distributed embedded systems 119 1998
 
LSI LOGIC CORPORATION (1)
5,475,803 Method for 2-D affine transformation of images 144 1992
 
SIEMENS AKTIENGESELLSCHAFT (1)
5,043,978 Circuit arrangement for telecommunications exchanges 79 1989
 
CAMBRIDGE MANAGEMENT CORPORATION (1)
5,287,532 Processor elements having multi-byte structure shift register for shifting data either byte wise or bit wise with single-bit output formed at bit positions thereof spaced by one byte 69 1990
 
FUJITSU LIMITED (6)
5,506,998 Parallel data processing system using a plurality of processing elements to process data and a plurality of trays connected to some of the processing elements to store and transfer data 98 1994
5,544,336 Parallel data processing system which efficiently performs matrix and neurocomputer operations, in a negligible data transmission time 92 1995
5,655,069 Apparatus having a plurality of programmable logic processing units for self-repair 165 1996
6,185,256 Signal transmission system using PRD method, receiver circuit for use in the signal transmission system, and semiconductor memory device to which the signal transmission system is applied 68 1998
6,404,224 Chain-connected shift register and programmable logic circuit whose logic function is changeable in real time 164 1999
2009/0085,603 FPGA configuration protection and control using hardware watchdog timer 44 2007
 
MOTOROLA, INC. (2)
5,493,239 Circuit and method of configuring a field programmable gate array 146 1995
5,649,179 Dynamic instruction allocation for a SIMD processor 75 1995
 
INFINEON TECHNOLOGIES AG (2)
6,717,436 Reconfigurable gate array 106 2002
7,254,649 Wireless spread spectrum communication platform using dynamically reconfigurable logic 59 2005
 
ROUND ROCK RESEARCH, LLC (3)
5,247,689 Parallel digital processor including lateral transfer buses with interrupt switches to form bus interconnection segments 122 1990
5,887,162 Memory device having circuitry for initializing and reprogramming a control operation feature 70 1997
6,170,051 Apparatus and method for program level parallelism in a VLIW processor 142 1997
 
Deutsche ITT Industries GmbH (1)
5,410,723 Wavefront array processor for blocking the issuance of first handshake signal (req) by the presence of second handshake signal (ack) which indicates the readyness of the receiving cell 126 1993
 
GENERAL SEMICONDUCTOR, INC. (1)
4,414,547 Storage logic array having two conductor data column 82 1981
 
INTEL CORPORATION (29)
4,910,665 Distributed processing system including reconfigurable elements 97 1986
5,023,775 Software programmable logic array utilizing "and" and "or" gates 119 1990
5,392,437 Method and apparatus for independently stopping and restarting functional units 216 1992
5,634,131 Method and apparatus for independently stopping and restarting functional units 133 1994
5,889,982 Method and apparatus for generating event handler vectors based on both operating mode and event type 80 1995
5,652,894 Method and apparatus for providing power saving modes to a pipelined processor 107 1995
6,389,579 Reconfigurable logic for table lookup 99 1999
6,243,808 Digital data bit order conversion using universal switch matrix comprising rows of bit swapping selector groups 99 1999
6,298,472 Behavioral silicon construct architecture and mapping 132 1999
6,347,346 Local memory unit system with global access for use on reconfigurable chips 141 1999
6,370,596 Logic flag registers for monitoring processing system events 96 1999
6,341,318 DMA data streaming 108 1999
6,288,566 Configuration state memory for functional blocks on a reconfigurable chip 101 1999
6,311,200 Reconfigurable program sum of products generator 97 1999
6,349,346 Control fabric unit including associated configuration memory and PSOP state machine adapted to provide configuration address to reconfigurable functional unit 104 1999
6,519,674 Configuration bits layout 86 2000
6,539,477 System and method for control synthesis using a reachable states look-up table 99 2000
* 6,871,341 Adaptive scheduling of function cells in dynamic reconfigurable logic 72 2000
6,282,627 Integrated processor and programmable data path chip for reconfigurable computing 254 2000
* 6,708,325 Method for compiling high level programming languages into embedded microprocessor with multiple reconfigurable logic 76 2000
6,392,912 Loading data plane on reconfigurable chip 96 2001
2002/0143,505 Implementing a finite state machine using concurrent finite state machines with delayed communications and no shared control signals 68 2001
2002/0013,861 Method and apparatus for low overhead multithreaded communication in a parallel processing environment 77 2001
2003/0056,091 Method of scheduling in a reconfigurable hardware architecture with multiple hardware configurations 70 2001
2003/0055,861 Multipler unit in reconfigurable chip 90 2001
2003/0052,711 Despreader/correlator unit for use in reconfigurable chip 66 2001
2002/0038,414 Address generator for local system memory in reconfigurable logic chip 65 2001
6,868,476 Software controlled content addressable memory in a general purpose execution datapath 68 2002
7,216,204 Mechanism for providing early coherency detection to enable high performance memory updates in a latency sensitive multithreaded environment 58 2002
 
MITSUBISHI DENKI KABUSHIKI KAISHA (3)
5,047,924 Microcomputer 72 1988
5,010,401 Picture coding and decoding apparatus using vector quantization 135 1989
5,237,686 Multiprocessor type time varying image encoding system and image processor with memory bus control table for arbitration priority 113 1992
 
HOLOGIC, INC. (1)
6,430,309 Specimen preview and inspection system 66 1998
 
TAROFISS DATA LIMITED LIABILITY COMPANY (2)
5,802,290 Computer network of distributed virtual computers which are EAC reconfigurable in response to instruction to be executed 228 1996
6,289,440 Virtual computer of plural FPG's successively reconfigured in response to a succession of inputs 98 1999
 
PRINCETON GAMMA-TECH INSTRUMENTS, INC. (1)
5,349,193 Highly sensitive nuclear spectrometer apparatus and method 89 1993
 
CADENCE DESIGN SYSTEMS, INC. (4)
5,680,583 Method and apparatus for a trace buffer in an emulation system 85 1994
6,020,760 I/O buffer circuit with pin multiplexing 105 1997
6,389,379 Converification system and method 155 1998
6,421,808 Hardware design language for the design of integrated circuits 81 1999
 
CHAMELEON SEMICONDUCTOR (2)
* 5,966,534 Method for compiling high level programming languages into an integrated processor with reconfigurable logic 189 1997
5,970,254 Integrated processor and programmable data path chip for reconfigurable computing 257 1997
 
FREESCALE SEMICONDUCTOR, INC. (3)
5,561,738 Data processor for executing a fuzzy logic operation and method therefor 94 1994
5,815,715 Method for designing a product having hardware and software components and product therefor 74 1995
5,737,516 Data processing system for performing a debug function and method therefor 155 1995
 
Thomson-CSF (1)
4,891,810 Reconfigurable computing device 106 1987
 
CALIFORNIA INSTITUTE OF TECHNOLOGY (1)
6,038,656 Pipelined completion for asynchronous communication 87 1998
 
ALTERA CORPORATION (25)
5,444,394 PLD with selective inputs from local and global conductors 139 1993
5,550,782 Programmable logic array integrated circuits 290 1994
5,473,266 Programmable logic device having fast programmable logic array blocks and a central global interconnect array 114 1994
5,485,103 Programmable logic array with local and global conductors 187 1994
5,537,057 Programmable logic array device with grouped logic regions and three types of conductors 260 1995
5,570,040 Programmable logic array integrated circuit incorporating a first-in first-out memory 189 1995
5,541,530 Programmable logic array integrated circuits with blocks of logic regions grouped into super-blocks 152 1995
5,815,726 Coarse-grained look-up table architecture 220 1995
6,020,758 Partially reconfigurable programmable logic device 116 1996
5,859,544 Dynamic configurable elements for programmable logic devices 117 1996
5,828,229 Programmable logic array integrated circuits 157 1997
6,085,317 Reconfigurable computer architecture using programmable logic devices 168 1997
6,134,166 Programmable logic array integrated circuit incorporating a first-in first-out memory 54 1998
6,247,147 Enhanced embedded logic analyzer 107 1998
6,216,223 Methods and apparatus to dynamically reconfigure the instruction pipeline of an indirect very long instruction word scalable processor 73 1999
6,215,326 Programmable logic device architecture with super-regions having logic regions and a memory region 223 1999
6,658,564 Reconfigurable programmable logic device computer system 97 1999
2001/0032,305 Methods and apparatus for dual-use coprocessing/debug interface 119 2001
7,340,596 Embedded processor with watchdog timer for programmable logic 55 2001
2002/0124,238 Software-to-hardware compiler 60 2001
6,538,470 Devices and methods with programmable logic and digital signal processing regions 207 2001
6,525,678 Configuring a programmable logic device 74 2001
7,000,161 Reconfigurable programmable logic system with configuration recovery mode 64 2002
7,350,178 Embedded processor with watchdog timer for programmable logic 51 2004
7,346,644 Devices and methods with programmable logic and digital signal processing regions 50 2006
 
Echelon Corporation (2)
5,113,498 Input/output section for an intelligent cell which provides sensing, bidirectional communications and control 141 1990
5,844,888 Network and intelligent cell for providing sensing, bidirectional communications and control 139 1995
 
ELBRUS INTERNATIONAL LIMITED (1)
6,301,706 Compiler method and apparatus for elimination of redundant speculative computations from innermost loops 71 1998
 
INTERGRAPH HARDWARE TECHNOLOGIES COMPANY (1)
5,274,593 High speed redundant rows and columns for semiconductor memories 76 1990
 
MASSACHUSETTS INSTITUTE OF TECHNOLOGY (8)
5,596,742 Virtual interconnections for reconfigurable logic systems 214 1993
5,440,538 Communication system with redundant links and data bit time multiplexing 83 1993
5,742,180 Dynamically programmable gate array with multiple contexts 286 1995
6,052,773 DPGA-coupled microprocessors 192 1995
5,761,484 Virtual interconnections for reconfigurable logic systems 182 1995
5,956,518 Intermediate-grain reconfigurable processing device 189 1996
6,127,908 Microelectro-mechanical system actuator device and reconfigurable circuits utilizing same 182 1997
5,927,423 Reconfigurable footprint mechanism for omnidirectional vehicles 96 1998
 
MIRALFIN S.R.L. (1)
5,760,602 Time multiplexing a plurality of configuration settings of a programmable switch element in a FPGA 122 1996
 
MORPHO TECHNOLOGIES (1)
2003/0123,579 Viterbi convolutional coding method and apparatus 71 2002
 
ISCO, INC. (1)
5,125,801 Pumping system 81 1990
 
NEC CORPORATION (1)
4,591,979 Data-flow-type digital processing apparatus 109 1983
 
KEYBOARD KOMFORT, INC. (1)
5,966,143 Data allocation into multiple memories for concurrent access 58 1997
 
PRINCETON UNIVERSITY, NON-PROFIT ORGANIZATION (1)
4,811,214 Multinode reconfigurable pipeline computer 239 1986
 
ACTEL CORPORATION (4)
5,440,245 Logic module with configurable combinational and sequential blocks 102 1993
5,457,644 Field programmable digital signal processing array integrated circuit 173 1993
5,510,730 Reconfigurable programmable interconnect architecture 117 1995
5,600,265 Programmable interconnect architecture 118 1995
 
MICROSOFT TECHNOLOGY LICENSING, LLC (2)
6,748,440 Flow of streaming data through multiple processing modules 51 1999
7,007,096 Efficient splitting and mixing of streaming-data frames for processing through multiple processing modules 56 1999
 
QUICKFLEX, INC. (1)
6,539,438 Reconfigurable computing system and method and apparatus employing same 100 1999
 
PRINCETON UNIVERSITY (1)
5,442,790 Optimizing compiler for computers 176 1994
 
NEC ELECTRONICS CORPORATION (1)
5,926,638 Program debugging system for debugging a program having graphical user interface 86 1997
 
CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC. (1)
6,434,699 Encryption processor with shared memory interconnect 120 2000
 
QUICKLOGIC CORPORATION (4)
5,773,994 Method and apparatus for implementing an internal tri-state bus within a programmable logic circuit 78 1995
5,892,370 Clock network for field programmable gate array 67 1997
6,426,649 Architecture for field programmable gate array 120 2000
6,483,343 Configurable computational unit embedded in a programmable device 238 2000
 
QUALCOMM INCORPORATED (1)
7,249,351 System and method for preparing software for execution in a dynamically configurable hardware environment 61 2000
 
ZIILABS INC., LTD. (2)
6,977,649 3D graphics rendering with selective read suspend 49 1999
6,847,370 Planar byte memory organization with linear access 59 2002
 
NANOWIRE LIMITED LIABILITY COMPANY (1)
6,092,174 Dynamically reconfigurable distributed integrated circuit processor and method 137 1998
 
Dell USA, L.P. (1)
5,530,946 Processor failure detection and recovery circuit in a dual processor computer system and method of operation thereof 116 1994
 
Walker-Estes Corporation (1)
5,301,284 Mixed-resolution, N-dimensional object space method and apparatus 109 1991
 
ALLEN-BRADLEY COMPANY, INC. (1)
5,428,526 Programmable controller with time periodic communication 79 1993
 
CVSI, INC. (1)
4,761,755 Data processing system and method having an improved arithmetic unit 105 1984
 
E-SYSTEMS, INC. (1)
4,967,340 Adaptive processing system having an array of individually configurable processing components 196 1988
 
RPX CORPORATION (1)
5,611,049 System for accessing distributed data cache channel at each network node to pass requests and data 332 1994
 
FRANCE TELECOM (1)
5,465,375 Multiprocessor system with cascaded modules combining processors through a programmable logic cell array 135 1993
 
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. (8)
6,353,841 Reconfigurable processor devices 138 1998
6,523,107 Method and apparatus for providing instruction streams to a processing device 49 1998
6,252,792 Field programmable processor arrays 61 1999
6,262,908 Field programmable processor devices 55 1999
6,567,834 Implementation of multipliers in programmable arrays 55 2000
6,542,394 Field programmable processor arrays 50 2001
6,901,502 Integrated circuit with CPU and FPGA for reserved instructions execution with configuration diagnosis 58 2001
6,820,188 Method and apparatus for varying instruction streams provided to a processing device using masks 50 2003
 
GENERAL DYNAMICS C4 SYSTEMS, INC. (1)
5,999,990 Communicator having reconfigurable resources 228 1998
 
ATMEL CORPORATION (3)
4,918,440 Programmable logic cell and array 167 1986
5,144,166 Programmable logic cell and array 353 1990
6,014,509 Field programmable gate array having access to orthogonal and diagonal adjacent neighboring cells 133 1997
* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
Other [Check patent profile for assignment information] (1)
* 2008/0216,064 Method, Architecture and Software of Meta-Operating System, Operating Systems and Applications For Parallel Computing Platforms 9 2008
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (4)
* 8,495,593 Method and system for state machine translation 1 2005
* 8,341,612 Method and apparatus for run-time statistics dependent program execution using source-coding 1 2007
* 8,701,099 Accelerating generic loop iterators using speculative execution 0 2010
* 2012/0110,302 Accelerating Generic Loop Iterators Using Speculative Execution 0 2010
 
PACT INFORMATIONSTECHNOLOGIE GMBH (1)
8,230,411 Method for interleaving a program over a plurality of cells 2000
 
ORACLE INTERNATIONAL CORPORATION (1)
* 8,434,076 Efficient compilation and execution of imperative-query languages 0 2007
 
SONY COMPUTER ENTERTAINMENT INC. (2)
* 7,950,003 Heads-up-display software development tool for analyzing and optimizing computer software 8 2007
9,013,494 Heads-up-display software development tool 0 2011
 
INTEL CORPORATION (2)
* 8,463,820 System and method for memory bandwidth friendly sorting on multi-core architectures 1 2009
* 2011/0066,806 System and method for memory bandwidth friendly sorting on multi-core architectures 1 2009
 
CADENCE DESIGN SYSTEMS, INC. (5)
8,402,438 Method and system for generating verification information and tests for software 5 2007
* 8,156,474 Automation of software verification 2 2007
* 2009/0172,649 AUTOMATION OF SOFTWARE VERIFICATION 2 2007
8,504,344 Interface between a verification environment and a hardware acceleration engine 0 2008
8,924,937 Method and system for generating verification information and tests for software 0 2013
 
PACT XPP TECHNOLOGIES AG (32)
* 7,996,827 Method for the translation of programs for reconfigurable architectures 11 2002
8,429,385 Device including a field having function cells and information providing cells controlled by the function cells 0 2002
8,281,108 Reconfigurable general purpose processor having time restricted configurations 0 2003
8,127,061 Bus systems and reconfiguration methods 0 2003
8,156,284 Data processing method and device 4 2003
8,301,872 Pipeline configuration protocol and configuration unit communication 0 2005
8,250,503 Hardware definition method including determining whether to implement a function as hardware or software 1 2007
8,209,653 Router 0 2008
8,099,618 Methods and devices for treating and processing data 2 2008
8,145,881 Data processing device and method 1 2008
8,069,373 Method for debugging reconfigurable architectures 1 2009
8,058,899 Logic cell array and bus system 1 2009
8,812,820 Data processing device and method 0 2009
8,819,505 Data processor having disabled cores 0 2009
8,914,590 Data processing method and device 0 2009
8,686,549 Reconfigurable elements 0 2009
8,312,301 Methods and devices for treating and processing data 0 2009
8,281,265 Method and device for processing data 1 2009
8,726,250 Configurable logic integrated circuit having a multidimensional structure of configurable elements 0 2010
8,312,200 Processor chip including a plurality of cache elements connected to a plurality of processor cores 0 2010
8,195,856 I/O and memory bus system for DFPS and units with two- or multi-dimensional programmable cell architectures 0 2010
RE45223 Method of self-synchronization of configurable elements of a programmable module 0 2010
RE45109 Method of self-synchronization of configurable elements of a programmable module 0 2010
RE44365 Method of self-synchronization of configurable elements of a programmable module 0 2010
9,037,807 Processor arrangement on a chip including data processing, memory, and interface elements 0 2010
8,686,475 Reconfigurable elements 0 2011
8,310,274 Reconfigurable sequencer structure 0 2011
8,869,121 Method for the translation of programs for reconfigurable architectures 0 2011
8,407,525 Method for debugging reconfigurable architectures 0 2011
8,471,593 Logic cell array and bus system 1 2011
8,468,329 Pipeline configuration protocol and configuration unit communication 0 2012
8,803,552 Reconfigurable sequencer structure 0 2012
 
TEXAS INSTRUMENTS INCORPORATED (1)
* 7,805,708 Automatic tool to eliminate conflict cache misses 4 2006
* Cited By Examiner

Maintenance Fees

Fee Large entity fee small entity fee micro entity fee due date
7.5 Year Payment $3600.00 $1800.00 $900.00 Aug 2, 2017
11.5 Year Payment $7400.00 $3700.00 $1850.00 Aug 2, 2021
Fee Large entity fee small entity fee micro entity fee
Surcharge - 7.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge - 11.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge after expiration - Late payment is unavoidable $700.00 $350.00 $175.00
Surcharge after expiration - Late payment is unintentional $1,640.00 $820.00 $410.00