Method for processing data

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7657877
APP PUB NO 20040243984A1
SERIAL NO

10480003

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method and device for translating a program to a system including at least one first processor and a reconfigurable unit. Code portions of the program which are suitable for the reconfigurable unit are determined. The remaining code of the program is extracted and/or separated for processing by the first processor.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
PACT XPP TECHNOLOGIES AGZURICH102

International Classification(s)

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  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cardoso, Joao Manuel Paiva Vila Nova de Paiva, PT 3 81
May, Frank Munich, DE 44 662
Nückel, Armin Neupotz, DE 17 128
Vorbach, Martin Munich, DE 152 3410
Weinhardt, Markus Munich, DE 13 399

Cited Art Landscape

Patent Info (Count) # Cites Year
 
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5561738 Data processor for executing a fuzzy logic operation and method therefor 96 1994
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CALIFORNIA INSTITUTE OF TECHNOLOGY (1)
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5550782 Programmable logic array integrated circuits 294 1994
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2001/0032,305 Methods and apparatus for dual-use coprocessing/debug interface 130 2001
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MASSACHUSETTS INSTITUTE OF TECHNOLOGY (8)
5596742 Virtual interconnections for reconfigurable logic systems 232 1993
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* Cited By Examiner

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Patent Info (Count) # Cites Year
 
Other [Check patent profile for assignment information] (2)
* 2008/0216,064 Method, Architecture and Software of Meta-Operating System, Operating Systems and Applications For Parallel Computing Platforms 12 2008
* 2010/0241,823 DATA PROCESSING DEVICE AND METHOD 0 2010
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (3)
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* 2012/0110,302 Accelerating Generic Loop Iterators Using Speculative Execution 1 2010
 
PACT INFORMATIONSTECHNOLOGIE GMBH (1)
8230411 Method for interleaving a program over a plurality of cells 2 2000
 
ORACLE INTERNATIONAL CORPORATION (2)
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* 2009/0158,262 EFFICIENT COMPILATION AND EXECUTION OF IMPERATIVE-QUERY LANGUAGES 1 2007
 
SONY INTERACTIVE ENTERTAINMENT INC. (2)
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9013494 Heads-up-display software development tool 0 2011
 
IDEMITSU KOSAN CO., LTD. (1)
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INTEL CORPORATION (2)
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CADENCE DESIGN SYSTEMS, INC. (6)
8402438 Method and system for generating verification information and tests for software 9 2007
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* 2009/0172,649 AUTOMATION OF SOFTWARE VERIFICATION 5 2007
8504344 Interface between a verification environment and a hardware acceleration engine 0 2008
* 2010/0082,315 INTERFACE BETWEEN A VERIFICATION ENVIRONMENT AND A HARDWARE ACCELERATION ENGINE 3 2008
8924937 Method and system for generating verification information and tests for software 0 2013
 
PACT XPP TECHNOLOGIES AG (60)
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8429385 Device including a field having function cells and information providing cells controlled by the function cells 0 2002
* 2006/0245,225 Reconfigurable elements 4 2002
8281108 Reconfigurable general purpose processor having time restricted configurations 0 2003
8127061 Bus systems and reconfiguration methods 0 2003
* 2007/0150,637 Bus systems and method for reconfiguration 1 2003
8156284 Data processing method and device 16 2003
* 2007/0050,603 Data processing method and device 85 2003
* 2007/0011,433 Method and device for data processing 1 2004
* 2005/0086,649 Method for the translation of programs for reconfigurable architectures 1 2004
8301872 Pipeline configuration protocol and configuration unit communication 2 2005
* 2005/0223,212 Pipeline configuration protocol and configuration unit communication 0 2005
* 2009/0031,104 Low Latency Massive Parallel Data Processing Device 8 2006
8250503 Hardware definition method including determining whether to implement a function as hardware or software 4 2007
8209653 Router 0 2008
* 2009/0037,865 ROUTER 0 2008
8099618 Methods and devices for treating and processing data 7 2008
* 2009/0100,286 METHODS AND DEVICES FOR TREATING AND PROCESSING DATA 1 2008
8145881 Data processing device and method 1 2008
* 2009/0144,522 Data Processing Device and Method 2 2008
* 2010/0281,235 RECONFIGURABLE FLOATING-POINT AND BIT-LEVEL DATA PROCESSING UNIT 1 2008
* 2011/0173,596 METHOD FOR FACILITATING COMPILATION OF HIGH-LEVEL CODE FOR VARYING ARCHITECTURES 1 2008
* 2011/0119,657 USING FUNCTION CALLS AS COMPILER DIRECTIVES 1 2008
8069373 Method for debugging reconfigurable architectures 2 2009
* 2009/0150,725 METHOD FOR DEBUGGING RECONFIGURABLE ARCHITECTURES 2 2009
8058899 Logic cell array and bus system 1 2009
* 2009/0146,691 LOGIC CELL ARRAY AND BUS SYSTEM 0 2009
8812820 Data processing device and method 1 2009
* 2009/0210,653 METHOD AND DEVICE FOR TREATING AND PROCESSING DATA 1 2009
* 2009/0172,351 DATA PROCESSING DEVICE AND METHOD 27 2009
8819505 Data processor having disabled cores 1 2009
* 2009/0300,445 METHOD AND SYSTEM FOR ALTERNATING BETWEEN PROGRAMS FOR EXECUTION BY CELLS OF AN INTEGRATED CIRCUIT 3 2009
8914590 Data processing method and device 0 2009
8686549 Reconfigurable elements 1 2009
8312301 Methods and devices for treating and processing data 0 2009
* 2010/0122,064 METHOD FOR INCREASING CONFIGURATION RUNTIME OF TIME-SLICED CONFIGURATIONS 3 2009
* 2010/0095,088 RECONFIGURABLE ELEMENTS 10 2009
* 2010/0023,796 METHODS AND DEVICES FOR TREATING AND PROCESSING DATA 0 2009
8281265 Method and device for processing data 3 2009
* 2010/0070,671 METHOD AND DEVICE FOR PROCESSING DATA 1 2009
8726250 Configurable logic integrated circuit having a multidimensional structure of configurable elements 1 2010
* 2011/0161,977 METHOD AND DEVICE FOR DATA PROCESSING 1 2010
8312200 Processor chip including a plurality of cache elements connected to a plurality of processor cores 0 2010
8195856 I/O and memory bus system for DFPS and units with two- or multi-dimensional programmable cell architectures 0 2010
* 2010/0287,324 CONFIGURABLE LOGIC INTEGRATED CIRCUIT HAVING A MULTIDIMENSIONAL STRUCTURE OF CONFIGURABLE ELEMENTS 0 2010
RE45223 Method of self-synchronization of configurable elements of a programmable module 0 2010
RE45109 Method of self-synchronization of configurable elements of a programmable module 0 2010
RE44365 Method of self-synchronization of configurable elements of a programmable module 0 2010
9037807 Processor arrangement on a chip including data processing, memory, and interface elements 1 2010
* 2011/0060,942 METHODS AND DEVICES FOR TREATING AND/OR PROCESSING DATA 11 2010
8686475 Reconfigurable elements 0 2011
* 2011/0145,547 RECONFIGURABLE ELEMENTS 13 2011
8310274 Reconfigurable sequencer structure 0 2011
8869121 Method for the translation of programs for reconfigurable architectures 5 2011
8407525 Method for debugging reconfigurable architectures 2 2011
8471593 Logic cell array and bus system 1 2011
8468329 Pipeline configuration protocol and configuration unit communication 0 2012
8803552 Reconfigurable sequencer structure 0 2012
9075605 Methods and devices for treating and processing data 0 2012
9047440 Logical cell array and bus system 4 2013
 
HYPERION CORE, INC. (1)
9086973 System and method for a cache in a multi-core processor 1 2010
 
GLOBALFOUNDRIES INC. (2)
* 8341612 Method and apparatus for run-time statistics dependent program execution using source-coding 1 2007
* 2008/0288,929 METHOD AND APPARATUS FOR RUN-TIME STATISTICS DEPENDENT PROGRAM EXECUTION USING SOURCE-CODING 2 2007
 
TEXAS INSTRUMENTS INCORPORATED (2)
* 7805708 Automatic tool to eliminate conflict cache misses 4 2006
* 2006/0259,691 Automatic Tool to Eliminate Conflict Cache Misses 7 2006
* Cited By Examiner

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