Multithreading microprocessor with optimized thread scheduler for increasing pipeline utilization efficiency
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United States of America Patent
Stats
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Feb 2, 2010
Grant Date -
Aug 10, 2006
app pub date -
Feb 4, 2005
filing date -
Feb 4, 2005
priority date (Note) -
In Force
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Importance

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Forward Citations
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Abstract
A multithreading processor for concurrently executing multiple threads is provided. The processor includes an execution pipeline and a thread scheduler that dispatches instructions of the threads to the execution pipeline. The execution pipeline detects a stalling event caused by a dispatched instruction, and flushes the execution pipeline to enable instructions of other threads to continue executing. The execution pipeline communicates to the scheduler which thread caused the stalling event, and the scheduler stops dispatching instructions for the thread until the stalling condition terminates. In one embodiment, the execution pipeline only flushes the thread including the instruction that caused the event. In one embodiment, the execution pipeline stalls rather than flushing if the thread is the only runnable thread. In one embodiment, the processor includes skid buffers to which the flushed instructions are rolled back so the instruction fetch pipeline need not be flushed, only the execution pipeline.

First Claim
Family

- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | Total Patents |
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MIPS TECH, LLC | SANTA CLARA, CA, US | 14 |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
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Jensen, Michael Gottlieb | Sunnyvale, US | 26 | 572 |
Jones, Darren M | Los Altos, US | 17 | 528 |
Kinter, Ryan C | Sammamish, US | 34 | 630 |
Vishin, Sanjay | Sunnyvale, US | 26 | 972 |
Cited Art Landscape
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2008/0069,129 TRANSACTION SELECTOR EMPLOYING ROUND-ROBIN APPARATUS SUPPORTING DYNAMIC PRIORITIES IN MULTI-PORT SWITCH | 19 | 2006 | |
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2006/0179,274 Instruction/skid buffers in a multithreading microprocessor | 26 | 2005 | |
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Patent Citation Ranking
Forward Cite Landscape
Patent Info | (Count) | # Cites | Year |
---|---|---|---|
|
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* 9934065 Servicing I/O requests in an I/O adapter device | 0 | 2016 | |
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* 8001549 Multithreaded computer system and multithread execution control method | 5 | 2007 | |
* 2007/0266,387 MULTITHREADED COMPUTER SYSTEM AND MULTITHREAD EXECUTION CONTROL METHOD | 13 | 2007 | |
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8078840 Thread instruction fetch based on prioritized selection from plural round-robin outputs for different thread states | 13 | 2008 | |
* 2009/0113,180 Fetch Director Employing Barrel-Incrementer-Based Round-Robin Apparatus For Use In Multithreading Microprocessor | 4 | 2008 | |
* 2009/0249,351 Round-Robin Apparatus and Instruction Dispatch Scheduler Employing Same For Use In Multithreading Microprocessor | 6 | 2009 | |
* 2009/0271,592 Apparatus For Storing Instructions In A Multithreading Microprocessor | 9 | 2009 | |
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7853777 Instruction/skid buffers in a multithreading microprocessor that store dispatched instructions to avoid re-fetching flushed instructions | 9 | 2005 | |
* 2006/0179,274 Instruction/skid buffers in a multithreading microprocessor | 26 | 2005 | |
8151268 Multithreading microprocessor with optimized thread scheduler for increasing pipeline utilization efficiency | 1 | 2010 | |
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9542235 Process-safe read/write locks | 0 | 2010 |
Maintenance Fees
Fee | Large entity fee | small entity fee | micro entity fee | due date |
---|---|---|---|---|
11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Aug 2, 2021 |
Fee | Large entity fee | small entity fee | micro entity fee |
---|---|---|---|
Surcharge - 11.5 year - Late payment within 6 months | $160.00 | $80.00 | $40.00 |
Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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