Method and system for efficiently recording processor events in host bus adapters
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United States of America Patent
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Feb 23, 2010
Issued Date -
N/A
app pub date -
May 18, 2004
filing date -
May 18, 2004
priority date (Note) -
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Abstract
A host bus adapter (“HBA”) is provided with a programmable trace logic that can be enabled or disabled by firmware running on the HBA and if enabled can receive trace information from at least one processor, which is stored in a local memory buffer controlled by a local memory interface. A receive and transmit path processor data is traced and stored in the local memory buffer. The trace logic includes an arbitration module that receives trace data from plural sources and the trace data is stored in a first in first out based buffer before being sent to a direct memory access arbiter module and then to an external memory. Trace data as stored in the external memory includes a trace data source identity value, and a time stamp value indicating when data was collected.
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