Non-volatile memory architecture for programmable-logic-based system on a chip
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United States of America Patent
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Mar 9, 2010
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app pub date -
Jun 2, 2008
filing date -
Jul 31, 2003
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Abstract
A programmable system-on-a-chip integrated circuit device includes a programmable logic block. A digital input/output circuit block is coupled to the programmable logic block. A SRAM block is coupled to the programmable logic block. At least one non-volatile memory block is coupled to the programmable logic block. A JTAG port is coupled to the programmable logic block. An analog circuit block including an analog-to-digital converter may be coupled to the programmable logic block and an analog input/output circuit block may be coupled to the analog circuit block.
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