Method, system and circuit for programming a non-volatile memory array
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United States of America Patent
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Mar 9, 2010
Grant Date -
May 24, 2007
app pub date -
Oct 17, 2006
filing date -
Oct 29, 2002
priority date (Note) -
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Abstract
The present invention is a multi-phase method, circuit and system for programming non-volatile memory (“NVM”) cells in an NVM array. The present invention may include a controller to determine when, during a first programming phase, one or more NVM cells of a first set of cells reaches or exceeds a first intermediate voltage, and to cause a charge pump circuit to apply to a terminal of the one or more cells in the first set second phase programming pulses to induce relatively greater threshold voltage changes in cells having less stored charge than in cells having relatively more stored charge.
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