Test device and method for testing stability of computer
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United States of America Patent
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Mar 16, 2010
Grant Date -
Apr 3, 2008
app pub date -
Sep 15, 2006
filing date -
Sep 15, 2006
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A test device is provided for testing stability of a computer when the computer is started up or shut down. The test device includes a monolithic chip and a switch module. The monolithic chip includes an input port and an output port. The input port receives a high level or a low level signal from the computer. A test control module is disposed in the monolithic chip. The switch module includes an input pin coupled to the output port of the monolithic chip and a pair of output pins corresponding to the input pin. The pair of output pins is connected to the computer, for controlling the computer to be started up or shut down. The input port of the monolithic chip is connected to the computer for detecting a state of the computer.
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