Hierarchical flush barrier mechanism with deadlock avoidance
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United States of America Patent
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Mar 23, 2010
Grant Date -
N/A
app pub date -
Apr 19, 2006
filing date -
Apr 19, 2006
priority date (Note) -
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Abstract
A data processing system can establish or maintain data coherency by issuing a data flush operation. The data processing system can be configured as a host executing one or more independent processes using one or more lower level devices. The lower level devices can be viewed as peer devices. Any of the host or the plurality of peer devices can be configured to initiate the flush operation. A device can determine whether the initiator of a flush operation is the host or a peer device. The device can perform a flush limited to local memory, or a subset of all available memory, if a peer device initiates the flush operation.
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