Multiple level cell phase-change memory devices having controlled resistance drift parameter, memory systems employing such devices and methods of reading memory devices
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United States of America Patent
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Apr 20, 2010
Grant Date -
Dec 25, 2008
app pub date -
Mar 28, 2008
filing date -
Jun 20, 2007
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Abstract
represents the initial resistance of the memory cell following the programming operation, t represents the time period; and α represents the drift parameter.
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