Current mirror circuit having drain-source voltage clamp
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United States of America Patent
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Apr 27, 2010
Grant Date -
Jan 1, 2009
app pub date -
Sep 4, 2008
filing date -
Sep 25, 2006
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A circuit and method for providing an output current that includes biasing an output transistor in accordance with a reference current to conduct the output current and further includes maintaining a voltage across the output transistor. One embodiment includes conducting a reference current through a diode-coupled first field-effect transistor (FET) and biasing a gate of a second FET matched to the diode-coupled first FET by a voltage equal to a gate voltage of the diode-coupled first FET. A current equal to the reference current is conducted through a third FET having a gate coupled to a drain of the second FET, the third FET matched to the second FET.
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