Interconnect structure and formation for package stacking of molded plastic area array package
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United States of America Patent
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May 11, 2010
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app pub date -
Jan 11, 2007
filing date -
May 12, 2006
priority date (Note) -
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Abstract
Apparatuses, methods, and systems for improved integrated circuit packages are described. An integrated circuit (IC) package includes a substrate having opposing first and second surfaces, an IC die, a plurality of conductive elements, and an encapsulating material. The substrate has a plurality of contact pads on the first surface that are electrically coupled to a plurality of electrically conductive features on the second surface. The plurality of conductive elements is formed on the first surface of the substrate. The IC die is located on the first surface of the substrate. The encapsulating material encapsulates the IC die and a portion of each element of the plurality of conductive elements.
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