Method to have fault resilient booting

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United States of America Patent

PATENT NO 7716464
SERIAL NO

11166687

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Abstract

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A method and apparatus is described herein for fault resilient booting of a platform. Upon booting the platform, any boot routines marked are skipped. A current boot routine to be executed in a boot sequence is registered in nonvolatile memory. An attempt to execute the current boot routine is made. If the attempt is successful, the next boot entry is determined and skipped or executed, based on whether it is marked. However, if the execution fails the current boot routine is marked and, upon subsequent execution of the boot sequence, skipped.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BLVD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Rothman, Michael A Payallup, US 389 9644
Swanson, Robert C Olympia, US 78 1462
Zimmer, Vincent J Federal Way, US 535 14341

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