Method and system for semiconductor memory
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United States of America Patent
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May 18, 2010
Grant Date -
Aug 13, 2009
app pub date -
Feb 12, 2008
filing date -
Feb 12, 2008
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Methods and systems for embodiments of a 9T memory cell, memory devices which utilize such 9T memory cells and the creation of embodiments of such memory devices are disclosed. More specifically, an embodiment of a 9T memory cell may comprise a 6T memory cell portion and a 3T read port. Additionally, in one embodiment, a memory which utilizes 9T memory cells may be made by from a grid comprising columns and rows of transistors formed according to a layout for 6T memory cells.
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