Cavity-type integrated circuit package
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United States of America Patent
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Jun 8, 2010
Grant Date -
N/A
app pub date -
Nov 10, 2004
filing date -
Sep 3, 2002
priority date (Note) -
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status (Latency Note)
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Abstract
A process for fabricating a cavity-type integrated circuit includes supporting a leadframe strip in a mold. The leadframe strip includes a die attach pad and a row of contact pads circumscribing the die attach pad. A package body is molded in the mold such that opposing surfaces of the die attach pad and of the contact pads are exposed. A semiconductor die is mounted to the die attach pad. Various ones of the contact pads are wire bonded to the semiconductor die and a lid is mounted on the package body to thereby enclose the semiconductor die and the wire bonds in a cavity of the integrated circuit package.
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