Semiconductor method having silicon-diffused metal wiring layer

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United States of America Patent

PATENT NO 7737555
SERIAL NO

11647187

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Abstract

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In a semiconductor device, an insulating interlayer having a groove is formed on an insulating underlayer. A silicon-diffused metal layer including no metal silicide is buried in the groove. A metal diffusion barrier layer is formed on the silicon-diffused metal layer and the insulating interlayer.

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Patent Owner(s)

  • RENESAS ELECTRONICS CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ohto, Koichi Kanagawa, JP 38 1167
Takewaki, Toshiyuki Kanagawa, JP 62 503
Usami, Tatsuya Kanagawa, JP 140 2087
Yamanishi, Nobuyuki Kanagawa, JP 9 65

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