Multiple use memory chip

United States of America Patent

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Jun 15, 2010
Grant Date
Jul 13, 2006
app pub date
Oct 11, 2005
filing date
Jul 10, 2002

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Abstract

A die for a memory array may store Flash and EEPROM bits in at least one Nitride Read Only Memory (NROM) array. Each array may store Flash, EEPROM or both types of bits.

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Patent Owner	Address
MORGAN STANLEY SENIOR FUNDING	1585 BROADWAY STREET NEW YORK NY 10036

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G11C:STATIC STORES

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[Patents Count]

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Inventor Name	Address	# of filed Patents	Total Citations
Eitan, Boaz	Ra'anana, IL	149	7589
Maayan, Eduardo	Kfar Saba, IL	58	1582

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Multiple use memory chip

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United States of America Patent

11246193

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PATENT NO	7738304
APP PUB NO	20060152975A1
SERIAL NO	11246193
DOCKET NO

US Family Size	Non-US Coverage
Patent Longevity	Forward Citations

DATE PUBLISHED	PUBLICATION/PATENT NO.	PUBLICATION TYPE
June 15, 2010	US,7738304,B2 US7738304B2	GRANTED PATENT AS SECOND PUBLICATION
July 13, 2006	US,20060152975,A1 US20060152975A1	FIRST PUBLISHED PATENT APPLICATION

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11246193

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