Three-dimensional package and method of making the same

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United States of America Patent

PATENT NO 7741152
APP PUB NO 20070172984A1
SERIAL NO

11645040

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Abstract

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A method of making a three-dimensional package, including: (a) providing a wafer; (b) forming at least one blind hole; (c) forming an isolation layer; (d) forming a conductive layer; (e) forming a dry film; (f) filling the blind hole with a solder; (g) removing the dry film; (h) patterning the conductive layer; (i) removing a part of the lower surface of the wafer and the isolation layer, so as to expose the conductive layer; (j) stacking a plurality of the wafers, and performing a reflow process; and (k) cutting the stacked wafers, so as to form a plurality of three-dimensional packages. As such, the lower end of the conductive layer is inserted into the solder of the lower wafer, so as to enhance the joint between the conductive layer and the solder, and effectively reduce the overall height of the three-dimensional packages after joining.

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Patent Owner(s)

Patent OwnerAddress
ADVANCED SEMICONDUCTOR ENGINEERING INCKAOHSIUNG

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cheng, Po-Jen Kaohsiung, TW 46 445
Huang, Min-Lung Kaohsiung, TW 84 1088
Lin, Chian-Chi Kaohsiung, TW 22 356
Lo, Jian-Wen Kaohsiung, TW 14 239
Su, Ching-Huei Kaohsiung, TW 44 392
Wang, Wei-Chung Kaohsiung, TW 91 634
Yee, Kuo-Chung Kaohsiung, TW 221 2787

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