Test system and method for testing electronic devices using a pipelined testing architecture

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United States of America Patent

PATENT NO 7743304
APP PUB NO 20070198881A1
SERIAL NO

11357480

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Abstract

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A test system for performing tests on devices under test (DUTs) includes a storage device storing test data for performing the tests on the DUTs, a shared processor for generating the test data, storing the test data in the storage device and generating a test control signal including one or more test instructions for executing the tests, and, for each DUT, a dedicated processor configured to receive a test control signal from the shared processor, and in response to the test control signal, transfer the test data for one of the test instructions to the DUT to execute that test instruction and verify the completion of that test instruction.

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Patent Owner(s)

Patent OwnerAddress
ADVANTEST CORPORATION1-6-2 MARUNOUCHI CHIYODA-KU TOKYO 100-0005

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
De, La Puente Edmundo Cupertino, US 22 169
Volkerink, Erik H San Jose, US 9 143

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