Methods of forming and operating NAND memory with side-tunneling
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United States of America Patent
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Jun 29, 2010
Grant Date -
Oct 2, 2008
app pub date -
Mar 30, 2007
filing date -
Mar 30, 2007
priority date (Note) -
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Abstract
A string of nonvolatile memory cells are formed with control gates extending between floating gates, control gates and floating gates separated by tunnel dielectric layers. Electron tunneling between control gates and floating gates is used for programming. A process for forming a memory array forms odd numbered floating gates from a first layer and even numbered floating gates from a second layer.
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