Method of fabricating a high-voltage transistor with an extended drain structure

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United States of America Patent

PATENT NO 7745291
APP PUB NO 20070293002A1
SERIAL NO

11807531

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Abstract

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A method for fabricating a high-voltage transistor with an extended drain region includes forming in a semiconductor substrate of a first conductivity type, first and second trenches that define a mesa having respective first and second sidewalls partially filling each of the trenches with a dielectric material that covers the first and second sidewalls. The remaining portions of the trenches are then filled with a conductive material to form first and second field plates. Source and body regions are formed in an upper portion of the mesa, with the body region separating the source from a lower portion of the mesa. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).

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Patent Owner(s)

Patent OwnerAddress
POWER INTEGRATIONS INCCALIFORNIA USA CALIFORNIA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Disney, Donald Ray Cupertino, US 101 3580

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