self align side wall active phase change memory
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United States of America Patent
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Jul 13, 2010
Grant Date -
Oct 23, 2008
app pub date -
Apr 17, 2007
filing date -
Apr 17, 2007
priority date (Note) -
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Abstract
, F being the feature size for a lithographic process used to manufacture the memory cell, and more preferably F being equal to a minimum feature size. Arrays of memory cells described herein include memory cells arranged in a cross point array, the array having a plurality of word lines and source lines arranged in parallel in a first direction and having a plurality of bit lines arranged in parallel in a second direction perpendicular to the first direction.
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