Integrated circuit package system employing thin profile techniques
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United States of America Patent
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Jul 20, 2010
Grant Date -
Jun 12, 2008
app pub date -
Dec 7, 2006
filing date -
Dec 7, 2006
priority date (Note) -
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Abstract
An integrated circuit package system that includes: providing an electrical interconnect system including a first lead-finger system and a second lead-finger system; stacking a second device over a first device between the first lead-finger system and the second lead-finger system; connecting the second device to the second lead-finger system with a bump bond; stacking a dummy device over the second device; and connecting the first device to the first lead-finger system with a wire bond.
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